14:30 - 15:05  Paper 5

Core and Code Visibility with the Latest Generation of Freescale debug cores

Barry Lock, Lauterbach

As processors become more complex the developer needs tools that give him even more insight into the interaction between the core and code. We will show how the latest generation of Freescale processor debug cores provide this visibility with examples of cache analysis, stall analysis and branch prediction unit operation. Our presentation will be backed up by live demonstrations on representative device types from the HCS12, Coldfire, MPC5xx, MPC55xx and the latest ARM multicore devices.